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| author |   Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-07 15:43:04 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-07 15:43:04 +0100 |
| commit | a56e74f546b64be93731e42d83baf5b538cc1b11 (patch) | |
| tree | 18f6dee45d801e57ac9db2a31664b0d5c0762c50 /arch/mips/bcm63xx/cpu.c | |
| parent | ARM: bL_switcher: Add query interface to discover CPU affinities (diff) | |
| parent | ARM: add support for bit sliced AES using NEON instructions (diff) | |
| download | wireguard-linux-a56e74f546b64be93731e42d83baf5b538cc1b11.tar.xz wireguard-linux-a56e74f546b64be93731e42d83baf5b538cc1b11.zip | |
Merge branch 'arm-aesbs' of git://git.linaro.org/people/ardbiesheuvel/linux-arm into devel-stable
Diffstat (limited to 'arch/mips/bcm63xx/cpu.c')
| -rw-r--r-- | arch/mips/bcm63xx/cpu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index 7e17374a9ae8..b713cd64b087 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c @@ -306,14 +306,14 @@ void __init bcm63xx_cpu_init(void) switch (c->cputype) { case CPU_BMIPS3300: - if ((read_c0_prid() & 0xff00) != PRID_IMP_BMIPS3300_ALT) + if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT) __cpu_name[cpu] = "Broadcom BCM6338"; /* fall-through */ case CPU_BMIPS32: chipid_reg = BCM_6345_PERF_BASE; break; case CPU_BMIPS4350: - switch ((read_c0_prid() & 0xff)) { + switch ((read_c0_prid() & PRID_REV_MASK)) { case 0x04: chipid_reg = BCM_3368_PERF_BASE; break; |