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| author |   Thomas Abraham <thomas.abraham@linaro.org> | 2012-10-29 19:45:37 +0900 |
|---|---|---|
| committer |   Kukjin Kim <kgene.kim@samsung.com> | 2012-10-29 19:45:37 +0900 |
| commit | fe267b8781981e70bbf233c3483387409785fae1 (patch) | |
| tree | 9e893f7afbd1164587c0ba56f08d081f2946b02d /arch/mips/include/asm/processor.h | |
| parent | ARM: EXYNOS: Remove wrong I2S0 clock from peril clock (diff) | |
| download | wireguard-linux-fe267b8781981e70bbf233c3483387409785fae1.tar.xz wireguard-linux-fe267b8781981e70bbf233c3483387409785fae1.zip | |
ARM: EXYNOS: Remove static io-remapping for gic and combiner
The physical base address of GIC and Interrupt Combiner is obtained from
device tree and then remapped during initialization. So remove the
static io-remapping for GIC and combiner.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/mips/include/asm/processor.h')
0 files changed, 0 insertions, 0 deletions