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| author |   Dan Williams <dan.j.williams@intel.com> | 2010-05-17 16:30:58 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-05-17 16:30:58 -0700 |
| commit | 0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (patch) | |
| tree | fcf504879883763557e696eff81427b1ab78f76b /arch/mips/include/asm/stackframe.h | |
| parent | DMAENGINE: extend the control command to include an arg (diff) | |
| parent | async_tx: trim dma_async_tx_descriptor in 'no channel switch' case (diff) | |
| download | wireguard-linux-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.tar.xz wireguard-linux-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.zip | |
Merge branch 'ioat' into dmaengine
Diffstat (limited to 'arch/mips/include/asm/stackframe.h')
| -rw-r--r-- | arch/mips/include/asm/stackframe.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 3b6da3330e32..c8419129e770 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -121,6 +121,25 @@ .endm #else .macro get_saved_sp /* Uniprocessor variation */ +#ifdef CONFIG_CPU_LOONGSON2F + /* + * Clear BTB (branch target buffer), forbid RAS (return address + * stack) to workaround the Out-of-order Issue in Loongson2F + * via its diagnostic register. + */ + move k0, ra + jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: move ra, k0 + li k0, 3 + mtc0 k0, $22 +#endif /* CONFIG_CPU_LOONGSON2F */ #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) lui k1, %hi(kernelsp) #else |