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| author |   Thomas Gleixner <tglx@linutronix.de> | 2020-02-07 13:38:57 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2020-02-17 20:12:16 +0100 |
| commit | e1bdb22ebe5363ed75ddedf836ca9f19e1195337 (patch) | |
| tree | 0ff39b2bb1d92f6f8c045f6dc0299f6b3b155651 /arch/mips/kernel/csrc-r4k.c | |
| parent | x86/vdso: Use generic VDSO clock mode storage (diff) | |
| download | wireguard-linux-e1bdb22ebe5363ed75ddedf836ca9f19e1195337.tar.xz wireguard-linux-e1bdb22ebe5363ed75ddedf836ca9f19e1195337.zip | |
mips: vdso: Use generic VDSO clock mode storage
Switch to the generic VDSO clock mode storage.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Link: https://lkml.kernel.org/r/20200207124403.244684017@linutronix.de
Diffstat (limited to 'arch/mips/kernel/csrc-r4k.c')
| -rw-r--r-- | arch/mips/kernel/csrc-r4k.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c index eed099f35bf1..437dda64fd7a 100644 --- a/arch/mips/kernel/csrc-r4k.c +++ b/arch/mips/kernel/csrc-r4k.c @@ -78,7 +78,7 @@ int __init init_r4k_clocksource(void) * by the VDSO (HWREna is configured by configure_hwrena()). */ if (cpu_has_mips_r2_r6 && rdhwr_count_usable()) - clocksource_mips.archdata.vdso_clock_mode = VDSO_CLOCK_R4K; + clocksource_mips.vdso_clock_mode = VDSO_CLOCKMODE_R4K; clocksource_register_hz(&clocksource_mips, mips_hpt_frequency); |