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| author |   Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:55:21 -0700 |
| commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
| tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /arch/mips/kernel/traps.c | |
| parent | Merge branch 'iop-raid6' into async-tx-next (diff) | |
| parent | dmaengine: Move all map_sg/unmap_sg for slave channel to its client (diff) | |
| download | wireguard-linux-bbb20089a3275a19e475dbc21320c3742e3ca423.tar.xz wireguard-linux-bbb20089a3275a19e475dbc21320c3742e3ca423.zip | |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e83da174b533..08f1edf355e8 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1502,7 +1502,7 @@ void __cpuinit per_cpu_trap_init(void) status_set); if (cpu_has_mips_r2) { - unsigned int enable = 0x0000000f; + unsigned int enable = 0x0000000f | cpu_hwrena_impl_bits; if (!noulri && cpu_has_userlocal) enable |= (1 << 29); @@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void) write_c0_hwrena(enable); } -#ifdef CONFIG_CPU_CAVIUM_OCTEON - write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */ -#endif - #ifdef CONFIG_MIPS_MT_SMTC if (!secondaryTC) { #endif /* CONFIG_MIPS_MT_SMTC */ |