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| author |   Eugene Korenevsky <ekorenevsky@gmail.com> | 2014-12-11 08:53:27 +0300 |
|---|---|---|
| committer |   Paolo Bonzini <pbonzini@redhat.com> | 2015-01-08 22:45:15 +0100 |
| commit | e9ac033e6b6970c7061725fc6824b3933eb5a0e7 (patch) | |
| tree | d505687fd801995fdd1632b2336d53598007f30f /arch/mips/kvm/mips.c | |
| parent | KVM: nVMX: Add nested msr load/restore algorithm (diff) | |
| download | wireguard-linux-e9ac033e6b6970c7061725fc6824b3933eb5a0e7.tar.xz wireguard-linux-e9ac033e6b6970c7061725fc6824b3933eb5a0e7.zip | |
KVM: nVMX: Improve nested msr switch checking
This patch improve checks required by Intel Software Developer Manual.
- SMM MSRs are not allowed.
- microcode MSRs are not allowed.
- check x2apic MSRs only when LAPIC is in x2apic mode.
- MSR switch areas must be aligned to 16 bytes.
- address of first and last byte in MSR switch areas should not set any bits
beyond the processor's physical-address width.
Also it adds warning messages on failures during MSR switch. These messages
are useful for people who debug their VMMs in nVMX.
Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/kvm/mips.c')
0 files changed, 0 insertions, 0 deletions