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authorNicholas Piggin <npiggin@gmail.com>2021-11-29 13:09:15 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2021-11-30 22:27:07 +1100
commit5402e239d09feea482d25d60df9b908cfaf9ec3c (patch)
tree0baed78e911ab2e3ecad64e0034dce5dfb9b1f6f /arch/powerpc/include/asm/book3s/64/mmu.h
parentpowerpc/perf: Fix PMU callbacks to clear pending PMI before resetting an overflown PMC (diff)
downloadwireguard-linux-5402e239d09feea482d25d60df9b908cfaf9ec3c.tar.xz
wireguard-linux-5402e239d09feea482d25d60df9b908cfaf9ec3c.zip
powerpc/64s: Get LPID bit width from device tree
Allow the LPID bit width and partition table size to be set at runtime from the device tree. Move the PID bit width detection into the same place. KVM does not support using the extra bits yet, this is mainly required to get the PTCR register values correct (so KVM will run but it will not allocate > 4096 LPIDs). OPAL firmware provides this property for POWER10 CPUs since skiboot commit 9b85f7d961f2 ("hdata: add mmu-pid-bits and mmu-lpid-bits for POWER10 CPUs"). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211129030915.1888332-1-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/include/asm/book3s/64/mmu.h')
-rw-r--r--arch/powerpc/include/asm/book3s/64/mmu.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/mmu.h b/arch/powerpc/include/asm/book3s/64/mmu.h
index c02f42d1031e..8c500dd6fee4 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu.h
@@ -62,6 +62,9 @@ extern struct patb_entry *partition_tb;
#define PRTS_MASK 0x1f /* process table size field */
#define PRTB_MASK 0x0ffffffffffff000UL
+/* Number of supported LPID bits */
+extern unsigned int mmu_lpid_bits;
+
/* Number of supported PID bits */
extern unsigned int mmu_pid_bits;
@@ -76,10 +79,8 @@ extern unsigned long __ro_after_init radix_mem_block_size;
#define PRTB_SIZE_SHIFT (mmu_pid_bits + 4)
#define PRTB_ENTRIES (1ul << mmu_pid_bits)
-/*
- * Power9 currently only support 64K partition table size.
- */
-#define PATB_SIZE_SHIFT 16
+#define PATB_SIZE_SHIFT (mmu_lpid_bits + 4)
+#define PATB_ENTRIES (1ul << mmu_lpid_bits)
typedef unsigned long mm_context_id_t;
struct spinlock;