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| author |   Yinghai Lu <yinghai@kernel.org> | 2017-04-20 22:04:48 -0700 |
|---|---|---|
| committer |   Bjorn Helgaas <helgaas@kernel.org> | 2018-02-15 15:07:30 -0600 |
| commit | b4a304489ef95b6b921d1faa46438d9ea89cfd4b (patch) | |
| tree | f6105882b0c7a6404faa37eea5c82fa90f0a030f /arch/sparc/kernel/pci_impl.h | |
| parent | Linux 4.16-rc1 (diff) | |
| download | wireguard-linux-b4a304489ef95b6b921d1faa46438d9ea89cfd4b.tar.xz wireguard-linux-b4a304489ef95b6b921d1faa46438d9ea89cfd4b.zip | |
sparc/PCI: Support arbitrary host bridge address offset
Add support for arbitrary bus address offset. Previously we ignored the
child (PCI) address in the "ranges" property and assumed it was always
zero. That means every host bridge window mapped to PCI bus address zero,
e.g.,
pci_bus 0000:00: root bus resource [mem 0x2000000000000-0x200007fffffff] (bus address [0x00000000-0x7fffffff])
But some systems have host bridge windows with non-zero child addresses, so
parse the child address and compute the offset between the parent (CPU) and
child (PCI) addresses. This allows windows like these:
/pci@305: PCI MEM [mem 0x2000000100000-0x200007effffff] offset 2000000000000
pci_sun4v f02ae7f8: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x2000000100000-0x200007effffff] (bus address [0x00100000-0x7effffff])
[bhelgaas: changelog]
Tested-by: Khalid Aziz <khalid.aziz@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Diffstat (limited to 'arch/sparc/kernel/pci_impl.h')
| -rw-r--r-- | arch/sparc/kernel/pci_impl.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/sparc/kernel/pci_impl.h b/arch/sparc/kernel/pci_impl.h index ac172961d276..4e3d15189fa9 100644 --- a/arch/sparc/kernel/pci_impl.h +++ b/arch/sparc/kernel/pci_impl.h @@ -100,6 +100,10 @@ struct pci_pbm_info { struct resource mem_space; struct resource mem64_space; struct resource busn; + /* offset */ + resource_size_t io_offset; + resource_size_t mem_offset; + resource_size_t mem64_offset; /* Base of PCI Config space, can be per-PBM or shared. */ unsigned long config_space; |