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| author |   Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-07 15:43:04 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-07 15:43:04 +0100 |
| commit | a56e74f546b64be93731e42d83baf5b538cc1b11 (patch) | |
| tree | 18f6dee45d801e57ac9db2a31664b0d5c0762c50 /arch/tile/kernel/unaligned.c | |
| parent | ARM: bL_switcher: Add query interface to discover CPU affinities (diff) | |
| parent | ARM: add support for bit sliced AES using NEON instructions (diff) | |
| download | wireguard-linux-a56e74f546b64be93731e42d83baf5b538cc1b11.tar.xz wireguard-linux-a56e74f546b64be93731e42d83baf5b538cc1b11.zip | |
Merge branch 'arm-aesbs' of git://git.linaro.org/people/ardbiesheuvel/linux-arm into devel-stable
Diffstat (limited to 'arch/tile/kernel/unaligned.c')
| -rw-r--r-- | arch/tile/kernel/unaligned.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c index b425fb6a480d..b030b4e78845 100644 --- a/arch/tile/kernel/unaligned.c +++ b/arch/tile/kernel/unaligned.c @@ -551,8 +551,8 @@ static tilegx_bundle_bits jit_x1_bnezt(int ra, int broff) /* * This function generates unalign fixup JIT. * - * We fist find unalign load/store instruction's destination, source - * reguisters: ra, rb and rd. and 3 scratch registers by calling + * We first find unalign load/store instruction's destination, source + * registers: ra, rb and rd. and 3 scratch registers by calling * find_regs(...). 3 scratch clobbers should not alias with any register * used in the fault bundle. Then analyze the fault bundle to determine * if it's a load or store, operand width, branch or address increment etc. |