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author | 2025-04-24 06:47:17 -0700 | |
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committer | 2025-04-25 14:55:22 +0200 | |
commit | 3e830f657f69ab6a4822d72ec2f364c6d51beef8 (patch) | |
tree | 15bf9fe187863954d53cab01dbe7a3d467275747 /arch/x86/events/core.c | |
parent | perf/x86/intel: Check the X86 leader for ACR group (diff) | |
download | wireguard-linux-3e830f657f69ab6a4822d72ec2f364c6d51beef8.tar.xz wireguard-linux-3e830f657f69ab6a4822d72ec2f364c6d51beef8.zip |
perf/x86: Optimize the is_x86_event
The current is_x86_event has to go through the hybrid_pmus list to find
the matched pmu, then check if it's a X86 PMU and a X86 event. It's not
necessary.
The X86 PMU has a unique type ID on a non-hybrid machine, and a unique
capability type. They are good enough to do the check.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20250424134718.311934-5-kan.liang@linux.intel.com
Diffstat (limited to '')
-rw-r--r-- | arch/x86/events/core.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index b2762f268dd0..92c3fb61f2d6 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -762,15 +762,16 @@ void x86_pmu_enable_all(int added) int is_x86_event(struct perf_event *event) { - int i; - - if (!is_hybrid()) - return event->pmu == &pmu; - - for (i = 0; i < x86_pmu.num_hybrid_pmus; i++) { - if (event->pmu == &x86_pmu.hybrid_pmu[i].pmu) - return true; - } + /* + * For a non-hybrid platforms, the type of X86 pmu is + * always PERF_TYPE_RAW. + * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE + * is a unique capability for the X86 PMU. + * Use them to detect a X86 event. + */ + if (event->pmu->type == PERF_TYPE_RAW || + event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE) + return true; return false; } |