diff options
| author |   David Woodhouse <dwmw@amazon.co.uk> | 2020-10-24 22:35:31 +0100 |
|---|---|---|
| committer |   Thomas Gleixner <tglx@linutronix.de> | 2020-10-28 20:26:28 +0100 |
| commit | 51130d21881d435fad5fa7f25bea77aa0ffc9a4e (patch) | |
| tree | 5faf6b3754dd0e36101b1bcc50204d9135b0bd57 /arch/x86/include/asm/io_apic.h | |
| parent | iommu/vt-d: Simplify intel_irq_remapping_select() (diff) | |
| download | wireguard-linux-51130d21881d435fad5fa7f25bea77aa0ffc9a4e.tar.xz wireguard-linux-51130d21881d435fad5fa7f25bea77aa0ffc9a4e.zip | |
x86/ioapic: Handle Extended Destination ID field in RTE
Bits 63-48 of the I/OAPIC Redirection Table Entry map directly to bits 19-4
of the address used in the resulting MSI cycle.
Historically, the x86 MSI format only used the top 8 of those 16 bits as
the destination APIC ID, and the "Extended Destination ID" in the lower 8
bits was unused.
With interrupt remapping, the lowest bit of the Extended Destination ID
(bit 48 of RTE, bit 4 of MSI address) is now used to indicate a remappable
format MSI.
A hypervisor can use the other 7 bits of the Extended Destination ID to
permit guests to address up to 15 bits of APIC IDs, thus allowing 32768
vCPUs before having to expose a vIOMMU and interrupt remapping to the
guest.
No behavioural change in this patch, since nothing yet permits APIC IDs
above 255 to be used with the non-IR I/OAPIC domain.
[ tglx: Converted it to the cleaned up entry/msi_msg format and added
commentry ]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20201024213535.443185-32-dwmw2@infradead.org
Diffstat (limited to 'arch/x86/include/asm/io_apic.h')
| -rw-r--r-- | arch/x86/include/asm/io_apic.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index 73da644b2f0d..437aa8d00e53 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h @@ -67,7 +67,8 @@ struct IO_APIC_route_entry { is_level : 1, masked : 1, reserved_0 : 15, - reserved_1 : 24, + reserved_1 : 17, + virt_destid_8_14 : 7, destid_0_7 : 8; }; struct { |