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| author | 2010-05-17 16:30:58 -0700 | |
|---|---|---|
| committer | 2010-05-17 16:30:58 -0700 | |
| commit | 0b28330e39bbe0ffee4c56b09fc415fcec595ea3 (patch) | |
| tree | fcf504879883763557e696eff81427b1ab78f76b /arch/x86/kernel/irqinit.c | |
| parent | DMAENGINE: extend the control command to include an arg (diff) | |
| parent | async_tx: trim dma_async_tx_descriptor in 'no channel switch' case (diff) | |
| download | wireguard-linux-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.tar.xz wireguard-linux-0b28330e39bbe0ffee4c56b09fc415fcec595ea3.zip | |
Merge branch 'ioat' into dmaengine
Diffstat (limited to 'arch/x86/kernel/irqinit.c')
| -rw-r--r-- | arch/x86/kernel/irqinit.c | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index ef257fc2921b..0ed2d300cd46 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c @@ -5,7 +5,6 @@ #include <linux/ioport.h> #include <linux/interrupt.h> #include <linux/timex.h> -#include <linux/slab.h> #include <linux/random.h> #include <linux/kprobes.h> #include <linux/init.h> @@ -141,6 +140,28 @@ void __init init_IRQ(void) x86_init.irqs.intr_init(); } +/* + * Setup the vector to irq mappings. + */ +void setup_vector_irq(int cpu) +{ +#ifndef CONFIG_X86_IO_APIC + int irq; + + /* + * On most of the platforms, legacy PIC delivers the interrupts on the + * boot cpu. But there are certain platforms where PIC interrupts are + * delivered to multiple cpu's. If the legacy IRQ is handled by the + * legacy PIC, for the new cpu that is coming online, setup the static + * legacy vector to irq mapping: + */ + for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++) + per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq; +#endif + + __setup_vector_irq(cpu); +} + static void __init smp_intr_init(void) { #ifdef CONFIG_SMP |
