diff options
| author |   Wolfram Sang <wsa+renesas@sang-engineering.com> | 2021-09-01 11:17:23 +0200 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2021-09-24 15:11:05 +0200 |
| commit | 3ae4087bf46a8772695a0441f1654eacddd3e2bb (patch) | |
| tree | 668dbb92fdb33f9141ab3c81b928a96695885ab1 /drivers/clk/renesas | |
| parent | clk: renesas: rzg2l: Fix clk status function (diff) | |
| download | wireguard-linux-3ae4087bf46a8772695a0441f1654eacddd3e2bb.tar.xz wireguard-linux-3ae4087bf46a8772695a0441f1654eacddd3e2bb.zip | |
clk: renesas: r8a779a0: Add TPU clock
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210901091725.35610-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas')
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index f16d125ca009..286687e74d19 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -205,6 +205,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("tmu2", 715, R8A779A0_CLK_S1D4), DEF_MOD("tmu3", 716, R8A779A0_CLK_S1D4), DEF_MOD("tmu4", 717, R8A779A0_CLK_S1D4), + DEF_MOD("tpu0", 718, R8A779A0_CLK_S1D8), DEF_MOD("vin00", 730, R8A779A0_CLK_S1D1), DEF_MOD("vin01", 731, R8A779A0_CLK_S1D1), DEF_MOD("vin02", 800, R8A779A0_CLK_S1D1), |