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| author |   Zaibo Xu <xuzaibo@huawei.com> | 2019-09-30 17:20:05 +0800 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2019-10-10 23:36:31 +1100 |
| commit | c8b4b477079d1995cc0a1c10d5cdfd02be938cdf (patch) | |
| tree | ca541149e20365a9c52b55316218c61e2a60039f /drivers/crypto/hisilicon/hpre/hpre.h | |
| parent | crypto: hisilicon - misc fix about sgl (diff) | |
| download | wireguard-linux-c8b4b477079d1995cc0a1c10d5cdfd02be938cdf.tar.xz wireguard-linux-c8b4b477079d1995cc0a1c10d5cdfd02be938cdf.zip | |
crypto: hisilicon - add HiSilicon HPRE accelerator
The HiSilicon HPRE accelerator implements RSA and DH algorithms. It
uses Hisilicon QM as interface to CPU.
This patch provides PCIe driver to the accelerator and registers its
algorithms to crypto akcipher and kpp interfaces.
Signed-off-by: Zaibo Xu <xuzaibo@huawei.com>
Signed-off-by: Hui Tang <tanghui20@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/hisilicon/hpre/hpre.h')
| -rw-r--r-- | drivers/crypto/hisilicon/hpre/hpre.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/crypto/hisilicon/hpre/hpre.h b/drivers/crypto/hisilicon/hpre/hpre.h new file mode 100644 index 000000000000..d2195998eca5 --- /dev/null +++ b/drivers/crypto/hisilicon/hpre/hpre.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2019 HiSilicon Limited. */ +#ifndef __HISI_HPRE_H +#define __HISI_HPRE_H + +#include <linux/list.h> +#include "../qm.h" + +#define HPRE_SQE_SIZE sizeof(struct hpre_sqe) +#define HPRE_PF_DEF_Q_NUM 64 +#define HPRE_PF_DEF_Q_BASE 0 +#define HPRE_CLUSTERS_NUM 4 + +struct hpre { + struct hisi_qm qm; + struct list_head list; + unsigned long status; +}; + +enum hpre_alg_type { + HPRE_ALG_NC_NCRT = 0x0, + HPRE_ALG_NC_CRT = 0x1, + HPRE_ALG_KG_STD = 0x2, + HPRE_ALG_KG_CRT = 0x3, + HPRE_ALG_DH_G2 = 0x4, + HPRE_ALG_DH = 0x5, +}; + +struct hpre_sqe { + __le32 dw0; + __u8 task_len1; + __u8 task_len2; + __u8 mrttest_num; + __u8 resv1; + __le64 key; + __le64 in; + __le64 out; + __le16 tag; + __le16 resv2; +#define _HPRE_SQE_ALIGN_EXT 7 + __le32 rsvd1[_HPRE_SQE_ALIGN_EXT]; +}; + +struct hpre *hpre_find_device(int node); +int hpre_algs_register(void); +void hpre_algs_unregister(void); + +#endif |