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| author |   Eneas U de Queiroz <cotequeiroz@gmail.com> | 2019-12-20 16:02:18 -0300 |
|---|---|---|
| committer |   Herbert Xu <herbert@gondor.apana.org.au> | 2019-12-27 18:18:04 +0800 |
| commit | 59e056cda4beb5412e3653e6360c2eb0fa770baa (patch) | |
| tree | 79fe1e03d3b4f34ed42988c2fd1feb838725c57a /drivers/crypto/qce/core.c | |
| parent | crypto: qce - initialize fallback only for AES (diff) | |
| download | wireguard-linux-59e056cda4beb5412e3653e6360c2eb0fa770baa.tar.xz wireguard-linux-59e056cda4beb5412e3653e6360c2eb0fa770baa.zip | |
crypto: qce - allow building only hashes/ciphers
Allow the user to choose whether to build support for all algorithms
(default), hashes-only, or skciphers-only.
The QCE engine does not appear to scale as well as the CPU to handle
multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
QCE handles only 2 requests in parallel.
Ipsec throughput seems to improve when disabling either family of
algorithms, sharing the load with the CPU. Enabling skciphers-only
appears to work best.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to '')
| -rw-r--r-- | drivers/crypto/qce/core.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c index 0a44a6eeacf5..cb6d61eb7302 100644 --- a/drivers/crypto/qce/core.c +++ b/drivers/crypto/qce/core.c @@ -22,8 +22,12 @@ #define QCE_QUEUE_LENGTH 1 static const struct qce_algo_ops *qce_ops[] = { +#ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER &skcipher_ops, +#endif +#ifdef CONFIG_CRYPTO_DEV_QCE_SHA &ahash_ops, +#endif }; static void qce_unregister_algs(struct qce_device *qce) |