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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-09-03 12:08:18 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2024-09-03 12:08:18 +0200
commitaead27d77f3e703f6056e12fb19f48a426df2fd7 (patch)
treeb471ce6c1f20326b4a206232589b07573d810ce5 /drivers/fpga/zynq-fpga.c
parentMerge tag 'coresight-next-v6.12' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next (diff)
parentfpga: zynq-fpga: Rename 'timeout' variable as 'time_left' (diff)
downloadwireguard-linux-aead27d77f3e703f6056e12fb19f48a426df2fd7.tar.xz
wireguard-linux-aead27d77f3e703f6056e12fb19f48a426df2fd7.zip
Merge tag 'fpga-for-6.12-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next
Xu writes: FPGA Manager changes for 6.12-rc1 FPGA unit test: - Macro's change improves fpga tests using deferred actions FPGA vendor drivers: - Wolfram's change renames confusing variables for Altera & Xilinx drivers. All patches have been reviewed on the mailing list, and have been in the last linux-next releases (as part of our for-next branch). Signed-off-by: Xu Yilun <yilun.xu@intel.com> * tag 'fpga-for-6.12-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga: fpga: zynq-fpga: Rename 'timeout' variable as 'time_left' fpga: socfpga: Rename 'timeout' variable as 'time_left' fpga: Simplify and improve fpga region test using deferred actions fpga: Simplify and improve fpga bridge test using deferred actions fpga: Simplify and improve fpga mgr test using deferred actions
Diffstat (limited to 'drivers/fpga/zynq-fpga.c')
-rw-r--r--drivers/fpga/zynq-fpga.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index 0ac93183d201..4db3d80e10b0 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c
@@ -387,7 +387,7 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, struct sg_table *sgt)
const char *why;
int err;
u32 intr_status;
- unsigned long timeout;
+ unsigned long time_left;
unsigned long flags;
struct scatterlist *sg;
int i;
@@ -427,8 +427,8 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, struct sg_table *sgt)
zynq_step_dma(priv);
spin_unlock_irqrestore(&priv->dma_lock, flags);
- timeout = wait_for_completion_timeout(&priv->dma_done,
- msecs_to_jiffies(DMA_TIMEOUT_MS));
+ time_left = wait_for_completion_timeout(&priv->dma_done,
+ msecs_to_jiffies(DMA_TIMEOUT_MS));
spin_lock_irqsave(&priv->dma_lock, flags);
zynq_fpga_set_irq(priv, 0);
@@ -452,7 +452,7 @@ static int zynq_fpga_ops_write(struct fpga_manager *mgr, struct sg_table *sgt)
if (priv->cur_sg ||
!((intr_status & IXR_D_P_DONE_MASK) == IXR_D_P_DONE_MASK)) {
- if (timeout == 0)
+ if (time_left == 0)
why = "DMA timed out";
else
why = "DMA did not complete";