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| author | 2018-09-10 19:51:07 +0800 | |
|---|---|---|
| committer | 2019-07-18 14:18:02 -0500 | |
| commit | 0fe6a7b49f61c4ae692c790dd7afc47841314f0e (patch) | |
| tree | 7f05fdb3a59016787b93dad0e11ed92feb1bcf51 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | drm/amdgpu: specify sdma instance 5~7 with second mmhub type (diff) | |
| download | wireguard-linux-0fe6a7b49f61c4ae692c790dd7afc47841314f0e.tar.xz wireguard-linux-0fe6a7b49f61c4ae692c790dd7afc47841314f0e.zip | |
drm/amdgpu: support hdp flush for more sdma instances
The bit RSVD_ENG0 to RSVD_ENG5 in GPU_HDP_FLUSH_REQ/GPU_HDP_FLUSH_DONE
can be leveraged for sdma instance 2~7 to poll register/memory.
Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Snow Zhang < Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index c4e04d14a1ee..b601da7eb97c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -648,6 +648,12 @@ struct nbio_hdp_flush_reg { u32 ref_and_mask_cp9; u32 ref_and_mask_sdma0; u32 ref_and_mask_sdma1; + u32 ref_and_mask_sdma2; + u32 ref_and_mask_sdma3; + u32 ref_and_mask_sdma4; + u32 ref_and_mask_sdma5; + u32 ref_and_mask_sdma6; + u32 ref_and_mask_sdma7; }; struct amdgpu_mmio_remap { |
