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| author |   Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
| commit | 9e90c7985229430428dc9ba0ec7fe422901b456d (patch) | |
| tree | cae2072feba8cc433a32d96568bbcf36070bd6e5 /drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | |
| parent | genirq/irqchip: Remove MULTI_IRQ_HANDLER as it's now obselete (diff) | |
| parent | irqchip/gic-v3-its: Make its_lock a raw_spin_lock_t (diff) | |
| download | wireguard-linux-9e90c7985229430428dc9ba0ec7fe422901b456d.tar.xz wireguard-linux-9e90c7985229430428dc9ba0ec7fe422901b456d.zip | |
Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c index 39ec6b8890a1..e74d620d9699 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c @@ -376,7 +376,7 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, struct amdgpu_device *adev = ring->adev; uint64_t index; - if (ring != &adev->uvd.inst[ring->me].ring) { + if (ring->funcs->type != AMDGPU_RING_TYPE_UVD) { ring->fence_drv.cpu_addr = &adev->wb.wb[ring->fence_offs]; ring->fence_drv.gpu_addr = adev->wb.gpu_addr + (ring->fence_offs * 4); } else { |