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| author |   Prike Liang <Prike.Liang@amd.com> | 2020-09-09 11:08:00 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-11-13 17:29:45 -0500 |
| commit | d90a53d65ad207d8eb73445fc4ceef461a98f861 (patch) | |
| tree | d815d2b1082d1aa9afb2d352bda63a226679779e /drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | |
| parent | drm/amdgpu: add s0i3 capacity check for s0i3 routine (v2) (diff) | |
| download | wireguard-linux-d90a53d65ad207d8eb73445fc4ceef461a98f861.tar.xz wireguard-linux-d90a53d65ad207d8eb73445fc4ceef461a98f861.zip | |
drm/amdgpu: add amdgpu_gfx_state_change_set() set gfx power change entry (v2)
The new amdgpu_gfx_state_change_set() funtion can support set GFX power
change status to D0/D3.
v2: squash in warning fix (Alex)
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h index 671d4b37c397..6b5a8f4642cc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h @@ -47,6 +47,12 @@ enum gfx_pipe_priority { AMDGPU_GFX_PIPE_PRIO_MAX }; +/* Argument for PPSMC_MSG_GpuChangeState */ +enum gfx_change_state { + sGpuChangeState_D0Entry = 1, + sGpuChangeState_D3Entry, +}; + #define AMDGPU_GFX_QUEUE_PRIORITY_MINIMUM 0 #define AMDGPU_GFX_QUEUE_PRIORITY_MAXIMUM 15 @@ -394,4 +400,5 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev, uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg); void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v); int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev); +void amdgpu_gfx_state_change_set(struct amdgpu_device *adev, enum gfx_change_state state); #endif |