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author | 2022-12-31 13:40:25 +0800 | |
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committer | 2022-12-31 13:40:25 +0800 | |
commit | b814eda949c324791580003303aa608761cfde3f (patch) | |
tree | df797e77f4fe19ecb0ce80c670f0defedaa8ef6c /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |
parent | Linux 6.2-rc1 (diff) | |
download | wireguard-linux-b814eda949c324791580003303aa608761cfde3f.tar.xz wireguard-linux-b814eda949c324791580003303aa608761cfde3f.zip |
soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD
NXP internal information shows that the PHY refclk is gated by the
GLOBAL_TX_PIX_CLK_EN bit, so to allow the PHY PLL to lock without the
LCDIF being already active, tie this bit to the HDMI_TX_PHY power
domain.
Fixes: e3442022f543 ("soc: imx: add i.MX8MP HDMI blk-ctrl")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
0 files changed, 0 insertions, 0 deletions