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| author |   Christian König <christian.koenig@amd.com> | 2022-06-03 15:05:04 +0200 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-06-08 11:44:25 -0400 |
| commit | 64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6 (patch) | |
| tree | 8c8b59c9340428b5ca12dcee6e6c744bedc0f4f2 /drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | |
| parent | drm/amdgpu: fix limiting AV1 to the first instance on VCN3 (diff) | |
| download | wireguard-linux-64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6.tar.xz wireguard-linux-64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6.zip | |
drm/amdgpu: always flush the TLB on gfx8
The TLB on GFX8 stores each block of 8 PTEs where any of the valid bits
are set.
Fixes: 5255e146c99a ("drm/amdgpu: rework TLB flushing")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Michal Kubecek <mkubecek@suse.cz>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c')
0 files changed, 0 insertions, 0 deletions