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| author |   Tom St Denis <tom.stdenis@amd.com> | 2016-03-23 13:16:13 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2016-05-02 15:25:41 -0400 |
| commit | 5f64e77e47c3b19fc14ea5231b59d6aecfecb787 (patch) | |
| tree | be82107f5fc9329f91c0ea48ce24999277831de0 /drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | |
| parent | drm/amd/amdgpu: Add SW clock gating support to UVD 5 and 6 (diff) | |
| download | wireguard-linux-5f64e77e47c3b19fc14ea5231b59d6aecfecb787.tar.xz wireguard-linux-5f64e77e47c3b19fc14ea5231b59d6aecfecb787.zip | |
drm/amd/amdgpu: Enable clockgating for UVD5 on Tonga
This patch enables clock gating for the UVD5 block with
Tonga.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c')
0 files changed, 0 insertions, 0 deletions