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| author | 2021-03-22 08:48:54 +0800 | |
|---|---|---|
| committer | 2021-04-09 16:39:49 -0400 | |
| commit | 639979887a11e9c2c5d7e3ce2a560ed16b68854a (patch) | |
| tree | 61efc465178d42acf7ca9caeb4b453456457aa0d /drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |
| parent | drm/amd/pm: fix gpu reset failure by MP1 state setting (diff) | |
| download | wireguard-linux-639979887a11e9c2c5d7e3ce2a560ed16b68854a.tar.xz wireguard-linux-639979887a11e9c2c5d7e3ce2a560ed16b68854a.zip | |
drm/amdgpu: Use correct size when access vram
To make size is 4 byte aligned. Use &~0x3ULL instead of &3ULL.
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 8f981034d704..07e72d84e142 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1503,7 +1503,7 @@ static int amdgpu_ttm_access_memory(struct ttm_buffer_object *bo, memcpy(buf, &value, bytes); } } else { - bytes = cursor.size & 0x3ull; + bytes = cursor.size & ~0x3ULL; amdgpu_device_vram_access(adev, cursor.start, (uint32_t *)buf, bytes, write); |
