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| author |   Tao Zhou <tao.zhou1@amd.com> | 2024-10-17 11:56:12 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2024-12-10 10:26:45 -0500 |
| commit | 3d60a30c85bca8832ab21c4d8095b064d4e33dfe (patch) | |
| tree | 8fa7b11d9a6c7104442dc048eb8d74cd5cf87f88 /drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | |
| parent | drm/amdgpu: reduce the mmio writes in kiq setting (diff) | |
| download | wireguard-linux-3d60a30c85bca8832ab21c4d8095b064d4e33dfe.tar.xz wireguard-linux-3d60a30c85bca8832ab21c4d8095b064d4e33dfe.zip | |
drm/amdgpu: store PA with column bits cleared for RAS bad page
So the code can be simplified, and no need to expose the detail of PA
format outside address conversion.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/umc_v12_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c index 523ca830e9ac..ffc0b7d93d6f 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c @@ -219,6 +219,8 @@ static void umc_v12_0_convert_error_address(struct amdgpu_device *adev, /* clear [R13] in soc physical address */ soc_pa &= ~(0x1ULL << UMC_V12_0_PA_R13_BIT); + paddr_out->pa.pa = soc_pa; + /* loop for all possibilities of [R13 C4 C3 C2] */ for (column = 0; column < UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL; column++) { retired_page = soc_pa | ((column & 0x3) << UMC_V12_0_PA_C2_BIT); @@ -537,7 +539,7 @@ static int umc_v12_0_update_ecc_status(struct amdgpu_device *adev, ecc_err->status = status; ecc_err->ipid = ipid; ecc_err->addr = addr; - ecc_err->pa_pfn = UMC_V12_ADDR_MASK_BAD_COLS(pa_addr) >> AMDGPU_GPU_PAGE_SHIFT; + ecc_err->pa_pfn = pa_addr >> AMDGPU_GPU_PAGE_SHIFT; /* If converted pa_pfn is 0, use pa C4 pfn. */ if (!ecc_err->pa_pfn) |