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| author |   Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> | 2020-07-28 09:59:53 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-08-06 15:46:19 -0400 |
| commit | 9a81cc60796b9f86cf19245e68562750541bb575 (patch) | |
| tree | f55c1a8cb4bad13382c4163cf534c090d3436ce0 /drivers/gpu/drm/amd/amdgpu | |
| parent | drm/amd/display: Store tiling_flags and tmz_surface on dm_plane_state (diff) | |
| download | wireguard-linux-9a81cc60796b9f86cf19245e68562750541bb575.tar.xz wireguard-linux-9a81cc60796b9f86cf19245e68562750541bb575.zip | |
drm/amd/display: Reset plane when tiling flags change
[Why]
Enabling or disable DCC or switching between tiled and linear formats
can require bandwidth updates.
They're currently skipping all DC validation by being treated as purely
surface updates.
[How]
Treat tiling_flag changes (which encode DCC state) as a condition for
resetting the plane.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
0 files changed, 0 insertions, 0 deletions