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authorVladimir Stempen <vladimir.stempen@amd.com>2020-12-29 15:01:12 -0500
committerAlex Deucher <alexander.deucher@amd.com>2021-02-22 18:05:48 -0500
commit77a2b7265f20ee827e527eaa6f82b87e88388947 (patch)
treead682d99286a0cc1a5e4210837e9402ab55e7366 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
parentdrm/amd/display: move trace buffer to uncached memory. (diff)
downloadwireguard-linux-77a2b7265f20ee827e527eaa6f82b87e88388947.tar.xz
wireguard-linux-77a2b7265f20ee827e527eaa6f82b87e88388947.zip
drm/amd/display: Synchronize displays with different timings
[why] Vendor based fan noise improvement [how] Report timing synchronizable when DP streams time frame difference is less than 0.05 percent. Adjust DP DTOs and sync displays using MASTER_UPDATE_LOCK_DB_X_Y Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
index dee8ad1ebaa4..e0800cd1cc02 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h
@@ -123,6 +123,11 @@ void dcn10_enable_timing_synchronization(
int group_index,
int group_size,
struct pipe_ctx *grouped_pipes[]);
+void dcn10_enable_vblanks_synchronization(
+ struct dc *dc,
+ int group_index,
+ int group_size,
+ struct pipe_ctx *grouped_pipes[]);
void dcn10_enable_per_frame_crtc_position_reset(
struct dc *dc,
int group_size,