diff options
| author |   Anthony Koo <Anthony.Koo@amd.com> | 2020-01-14 16:23:31 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-02-06 15:04:36 -0500 |
| commit | bbf5f6c3f83bedd71006473849138a446ad4d9a3 (patch) | |
| tree | b5cb94b47814be2c3069083a55aedb41112d5872 /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c | |
| parent | drm/amd/display: Do not set optimized_require to false after plane disable (diff) | |
| download | wireguard-linux-bbf5f6c3f83bedd71006473849138a446ad4d9a3.tar.xz wireguard-linux-bbf5f6c3f83bedd71006473849138a446ad4d9a3.zip | |
drm/amd/display: Split program front end part that occur outside lock
[Why]
Eventually want to lock at a higher level in stack.
To do this, we need to be able to isolate the parts that need to be done
after pipe unlock.
[How]
Split out programming that is done post unlock.
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c index e7e5352ec424..681db997a532 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c @@ -32,6 +32,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { .init_hw = dcn10_init_hw, .apply_ctx_to_hw = dce110_apply_ctx_to_hw, .apply_ctx_for_surface = dcn10_apply_ctx_for_surface, + .post_unlock_program_front_end = dcn10_post_unlock_program_front_end, .update_plane_addr = dcn10_update_plane_addr, .update_dchub = dcn10_update_dchub, .update_pending_status = dcn10_update_pending_status, |