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authorAlex Deucher <alexander.deucher@amd.com>2022-01-28 16:26:08 -0500
committerAlex Deucher <alexander.deucher@amd.com>2022-02-07 18:03:50 -0500
commit120cc6e67a5e34069693cf1711ea222b8c414685 (patch)
tree4d07e7805fdfcc8ac7756843266ea037fcc34fc4 /drivers/gpu/drm/amd/include
parentdrm/amdgpu/display: change pipe policy for DCN 2.0 (diff)
downloadwireguard-linux-120cc6e67a5e34069693cf1711ea222b8c414685.tar.xz
wireguard-linux-120cc6e67a5e34069693cf1711ea222b8c414685.zip
drm/amdgpu: add missing license to dpcs_3_0_0 headers
MIT. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h7
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h7
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h
index 67faaf68e9d7..0bb47e06eee8 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h
@@ -1,3 +1,10 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2020 Advanced Micro Devices, Inc.
+ *
+ * Authors: AMD
+ */
+
#ifndef _dpcs_3_0_0_OFFSET_HEADER
#define _dpcs_3_0_0_OFFSET_HEADER
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h
index b4ef50a72868..23fa1121a967 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h
@@ -1,3 +1,10 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright (C) 2020 Advanced Micro Devices, Inc.
+ *
+ * Authors: AMD
+ */
+
#ifndef _dpcs_3_0_0_SH_MASK_HEADER
#define _dpcs_3_0_0_SH_MASK_HEADER