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| author |   Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> | 2025-01-30 10:46:08 +0530 |
|---|---|---|
| committer |   Ankit Nautiyal <ankit.k.nautiyal@intel.com> | 2025-01-30 19:44:45 +0530 |
| commit | 08277aa5d5a44befd71717de35b956f55e1e8401 (patch) | |
| tree | 031051ae37d41b103d7b25dec70853d6f7ed13c5 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/dp: Compute as_sdp.vtotal based on vrr timings (diff) | |
| download | wireguard-linux-08277aa5d5a44befd71717de35b956f55e1e8401.tar.xz wireguard-linux-08277aa5d5a44befd71717de35b956f55e1e8401.zip | |
drm/i915/dp: Compute as_sdp based on if vrr possible
Adaptive sync sdp param computation, we can configure during
full modeset as well when sink is having vrr support, where
it doesn't need dependency on vrr.enable status and can also
match vrr enable/disable fastset requirement.
--v2:
- Separate the change from as_sdp.vtotal. [Ankit]
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250130051609.1796524-6-mitulkumar.ajitkumar.golani@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions