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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-01-16 22:16:35 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-01-21 17:12:44 +0200
commit42fdbe94b69ceed77622e58b33701546f49283a4 (patch)
tree4593c029779cb2e469871a4799407c002cb0609a /drivers/gpu/drm/i915/display/intel_dp_mst.c
parentdrm/i915: Extract lrr_params_changed() (diff)
downloadwireguard-linux-42fdbe94b69ceed77622e58b33701546f49283a4.tar.xz
wireguard-linux-42fdbe94b69ceed77622e58b33701546f49283a4.zip
drm/i915: Allow fastboot to fix up the vblank delay
GOP might not agree with our idea of what the vblank delay should be. Reuse the LRR codepaths to fix that up via a fastset. The relevant registers aren't actually double buffered so this is a little bit dodgy. While I've not seen any real issues from frobbing these live, let's limit this to just the fastboot case (by only allowing it when old_crtc_state->inherited==true). Cc: Paz Zcharya <pazz@chromium.org> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250116201637.22486-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions