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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-01-22 17:17:54 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-02-06 15:40:16 +0200
commit4d291c441bbc78805e6a4775383bd5a6f53d2e10 (patch)
tree0ba23a40e6c06ec1af7027172776a6e848b15803 /drivers/gpu/drm/i915/display/intel_dp_mst.c
parentdrm/i915: Calculate the VT-d guard size in the display code (diff)
downloadwireguard-linux-4d291c441bbc78805e6a4775383bd5a6f53d2e10.tar.xz
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drm/i915: Use per-plane VT-d guard numbers
Bspec lists different VT-d guard numbers (the number of dummy padding PTEs) for different platforms and plane types. Use those instead of just assuming the max glk+ number for everything. This could avoid a bit of overhead on older platforms due to reduced padding, and it makes it easier to cross check with the spec. Note that VLV/CHV do not document this w/a at all, so not sure if it's actually needed or not. Nor do we actually know how much padding is required if it is needed. For now use the same 128 PTEs that we use for snb-bdw primary planes. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250122151755.6928-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
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