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| author |   Jani Nikula <jani.nikula@intel.com> | 2024-12-11 16:43:10 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-12-16 16:58:17 +0200 |
| commit | 805cc9fef1fa9b07ab76d59ac733b915e0c52e48 (patch) | |
| tree | 7979b53ed1ba799ea56b3cea4f2f7647472639e0 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/xe3: do not configure auto min dbuf for cursor WMs (diff) | |
| download | wireguard-linux-805cc9fef1fa9b07ab76d59ac733b915e0c52e48.tar.xz wireguard-linux-805cc9fef1fa9b07ab76d59ac733b915e0c52e48.zip | |
drm/i915/mst: use intel_dp_compute_config_limits() for DP MST
There's a lot of duplication between mst_stream_compute_config_limits()
and intel_dp_compute_config_limits(). Adjust the latter to suit the
needs of the former, and use the same function for both. This reduces
duplication and highlights the differences for SST and MST and UHBR.
Remove the kernel-doc for intel_dp_compute_config_link_bpp_limits()
which now becomes static.
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241211144310.701895-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 29 |
1 files changed, 2 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 123c4ece6268..d77ebcb1432e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -585,33 +585,8 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp, bool dsc, struct link_config_limits *limits) { - /* - * for MST we always configure max link bw - the spec doesn't - * seem to suggest we should do otherwise. - */ - limits->min_rate = limits->max_rate = - intel_dp_max_link_rate(intel_dp); - - limits->min_lane_count = limits->max_lane_count = - intel_dp_max_lane_count(intel_dp); - - limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format); - /* - * FIXME: If all the streams can't fit into the link with - * their current pipe_bpp we should reduce pipe_bpp across - * the board until things start to fit. Until then we - * limit to <= 8bpc since that's what was hardcoded for all - * MST streams previously. This hack should be removed once - * we have the proper retry logic in place. - */ - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24); - - intel_dp_test_compute_config(intel_dp, crtc_state, limits); - - if (!intel_dp_compute_config_link_bpp_limits(intel_dp, - crtc_state, - dsc, - limits)) + if (!intel_dp_compute_config_limits(intel_dp, crtc_state, false, dsc, + limits)) return false; return adjust_limits_for_dsc_hblank_expansion_quirk(connector, |