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| author |   Cristian Ciocaltea <cristian.ciocaltea@collabora.com> | 2025-02-04 14:40:05 +0200 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2025-02-06 11:57:53 +0100 |
| commit | 9f40d7a94427a503e303b2a2d8db227d615e32c1 (patch) | |
| tree | 7f0cf552757435c0fd7aa913acd2585d18dbaed6 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | dt-bindings: display: vop2: Add optional PLL clock properties (diff) | |
| download | wireguard-linux-9f40d7a94427a503e303b2a2d8db227d615e32c1.tar.xz wireguard-linux-9f40d7a94427a503e303b2a2d8db227d615e32c1.zip | |
drm/rockchip: vop2: Drop unnecessary if_pixclk_rate computation
The if_pixclk_rate variable is not being used outside of the if-block in
rk3588_calc_cru_cfg(), hence move the superfluous assignment from the
first branch to the inner comment-block.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20250204-vop2-hdmi0-disp-modes-v3-2-d71c6a196e58@collabora.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions