diff options
| author |   Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> | 2021-05-25 17:06:56 -0700 |
|---|---|---|
| committer |   Matt Roper <matthew.d.roper@intel.com> | 2021-05-26 06:46:42 -0700 |
| commit | 2fdb6a5ef6225a69dd16c13de416d9b7224cbc96 (patch) | |
| tree | 438eedc9b9c790e4b6d5becff0fe1023f37e8a7a /drivers/gpu/drm/i915/display/intel_psr.c | |
| parent | drm/i915/xelpd: Add VRR guardband for VRR CTL (diff) | |
| download | wireguard-linux-2fdb6a5ef6225a69dd16c13de416d9b7224cbc96.tar.xz wireguard-linux-2fdb6a5ef6225a69dd16c13de416d9b7224cbc96.zip | |
drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()
It removes intel_crtc_state from function argument of
intel_psr_enable_source() in order to use intel_psr_enable_source()
without intel_crtc_state on other psr internal functions.
And we can get cpu_trancoder from intel_psr, therefore we don't need to
pass intel_crtc_state to this function.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-4-matthew.d.roper@intel.com
Diffstat (limited to '')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1b27af872ba1..000e1ffe8c05 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -990,11 +990,10 @@ static void intel_psr_activate(struct intel_dp *intel_dp) intel_dp->psr.active = true; } -static void intel_psr_enable_source(struct intel_dp *intel_dp, - const struct intel_crtc_state *crtc_state) +static void intel_psr_enable_source(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + enum transcoder cpu_transcoder = intel_dp->psr.transcoder; u32 mask; /* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+ @@ -1112,7 +1111,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp, &intel_dp->psr.vsc); intel_write_dp_vsc_sdp(encoder, crtc_state, &intel_dp->psr.vsc); intel_psr_enable_sink(intel_dp); - intel_psr_enable_source(intel_dp, crtc_state); + intel_psr_enable_source(intel_dp); intel_dp->psr.enabled = true; intel_psr_activate(intel_dp); |