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author | 2024-06-18 08:30:23 +0300 | |
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committer | 2024-06-19 07:42:10 +0300 | |
commit | 3ec391a007f405b4fe48ecf2bf55d3ff0fc7d1b2 (patch) | |
tree | 5695a96d742f1f446c9dd0bb907f71594b0cebab /drivers/gpu/drm/i915/display/intel_psr.c | |
parent | drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is set (diff) | |
download | wireguard-linux-3ec391a007f405b4fe48ecf2bf55d3ff0fc7d1b2.tar.xz wireguard-linux-3ec391a007f405b4fe48ecf2bf55d3ff0fc7d1b2.zip |
drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only
Enabling/disabling Panel Replay on sink side has to be done before link
training. We can't disable it in sink side on PSR disable.
Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-7-jouni.hogander@intel.com
Diffstat (limited to '')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_psr.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 800cfeabc139..595097353ceb 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1974,13 +1974,13 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) } /* Disable PSR on Sink */ - drm_dp_dpcd_writeb(&intel_dp->aux, - intel_dp->psr.panel_replay_enabled ? - PANEL_REPLAY_CONFIG : DP_PSR_EN_CFG, 0); + if (!intel_dp->psr.panel_replay_enabled) { + drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); - if (!intel_dp->psr.panel_replay_enabled && - intel_dp->psr.sel_update_enabled) - drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0); + if (intel_dp->psr.sel_update_enabled) + drm_dp_dpcd_writeb(&intel_dp->aux, + DP_RECEIVER_ALPM_CONFIG, 0); + } intel_dp->psr.enabled = false; intel_dp->psr.panel_replay_enabled = false; |