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author | 2022-10-14 16:02:39 -0700 | |
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committer | 2022-10-17 10:18:50 -0700 | |
commit | a7ec65fc7e83f342d1392cac69e4f60c7a7cc4ba (patch) | |
tree | ab69c4a62d302fc9bd646078f8e9e1d36cfec86c /drivers/gpu/drm/i915/gt/intel_workarounds.c | |
parent | drm/i915/xelpg: Add multicast steering (diff) | |
download | wireguard-linux-a7ec65fc7e83f342d1392cac69e4f60c7a7cc4ba.tar.xz wireguard-linux-a7ec65fc7e83f342d1392cac69e4f60c7a7cc4ba.zip |
drm/i915/xelpmp: Add multicast steering for media GT
MTL's media IP (Xe_LPM+) only has a single type of steering ("OAADDRM")
which selects between media slice 0 and media slice 1. We'll always
steer to media slice 0 unless it is fused off (which is the case when
VD0, VE0, and SFC0 are all reported as unavailable).
Bspec: 67789
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221014230239.1023689-15-matthew.d.roper@intel.com
Diffstat (limited to '')
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_workarounds.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 711a31935857..bae960486872 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1599,13 +1599,26 @@ xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) } static void +xelpmp_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) +{ + /* FIXME: Actual workarounds will be added in future patch(es) */ + + debug_dump_steering(gt); +} + +static void gt_init_workarounds(struct intel_gt *gt, struct i915_wa_list *wal) { struct drm_i915_private *i915 = gt->i915; - /* FIXME: Media GT handling will be added in an upcoming patch */ - if (gt->type == GT_MEDIA) + if (gt->type == GT_MEDIA) { + if (MEDIA_VER(i915) >= 13) + xelpmp_gt_workarounds_init(gt, wal); + else + MISSING_CASE(MEDIA_VER(i915)); + return; + } if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) xelpg_gt_workarounds_init(gt, wal); |