diff options
| author |   Colin Xu <colin.xu@intel.com> | 2018-06-11 15:39:31 +0800 |
|---|---|---|
| committer |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2018-06-13 10:57:29 +0800 |
| commit | 6fa6616b8f7adaf8380d72e53733bc2472b0d157 (patch) | |
| tree | 13699869fda38afb52665a7a37473f11db33a904 /drivers/gpu/drm/i915/gvt/gvt.c | |
| parent | drm/i915/gvt: Add MEDIA_POOL_STATE for BXT. (diff) | |
| download | wireguard-linux-6fa6616b8f7adaf8380d72e53733bc2472b0d157.tar.xz wireguard-linux-6fa6616b8f7adaf8380d72e53733bc2472b0d157.zip | |
drm/i915/gvt: Enable device info initialization for BXT.
Initialize BXT device info as SKL/KBL.
v2: All supported platforms share the same device configuration.
Remove the platform check by now and let is_supported_device()
be the gate keeper.
Signed-off-by: Colin Xu <colin.xu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/gvt/gvt.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gvt/gvt.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c index 22a3ddff38a3..4e65266e7b95 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.c +++ b/drivers/gpu/drm/i915/gvt/gvt.c @@ -238,18 +238,15 @@ static void init_device_info(struct intel_gvt *gvt) struct intel_gvt_device_info *info = &gvt->device_info; struct pci_dev *pdev = gvt->dev_priv->drm.pdev; - if (IS_BROADWELL(gvt->dev_priv) || IS_SKYLAKE(gvt->dev_priv) - || IS_KABYLAKE(gvt->dev_priv)) { - info->max_support_vgpus = 8; - info->cfg_space_size = PCI_CFG_SPACE_EXP_SIZE; - info->mmio_size = 2 * 1024 * 1024; - info->mmio_bar = 0; - info->gtt_start_offset = 8 * 1024 * 1024; - info->gtt_entry_size = 8; - info->gtt_entry_size_shift = 3; - info->gmadr_bytes_in_cmd = 8; - info->max_surface_size = 36 * 1024 * 1024; - } + info->max_support_vgpus = 8; + info->cfg_space_size = PCI_CFG_SPACE_EXP_SIZE; + info->mmio_size = 2 * 1024 * 1024; + info->mmio_bar = 0; + info->gtt_start_offset = 8 * 1024 * 1024; + info->gtt_entry_size = 8; + info->gtt_entry_size_shift = 3; + info->gmadr_bytes_in_cmd = 8; + info->max_surface_size = 36 * 1024 * 1024; info->msi_cap_offset = pdev->msi_cap; } |