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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-03-26 16:25:56 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-04-11 21:22:40 +0300 |
| commit | 4e2056e05e6eb646d37e310c11f6ac97a266b355 (patch) | |
| tree | bf9fbb82fa769b74b173611ecbd7106e1ce96f27 /drivers/gpu/drm/i915/i915_request.c | |
| parent | drm/i915/icl: Switch to using 12 deep CSB status FIFO (diff) | |
| download | wireguard-linux-4e2056e05e6eb646d37e310c11f6ac97a266b355.tar.xz wireguard-linux-4e2056e05e6eb646d37e310c11f6ac97a266b355.zip | |
drm/i915: Set DP min_bpp to 8*3 for non-RGB output formats
6bpc is only legal for RGB and RAW pixel encodings. For the rest
the minimum is 8bpc. Set our lower limit accordingly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190326142556.21176-6-ville.syrjala@linux.intel.com
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_request.c')
0 files changed, 0 insertions, 0 deletions