diff options
| author |   Mika Kuoppala <mika.kuoppala@linux.intel.com> | 2020-05-06 17:47:32 +0300 |
|---|---|---|
| committer |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-05-07 07:44:41 +0100 |
| commit | 32d7171ee2ae6e19c63b826904cf62d3d5a7f6fa (patch) | |
| tree | b8299959bc16a023e8b1449b5cd8d77fbe46df29 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" (diff) | |
| download | wireguard-linux-32d7171ee2ae6e19c63b826904cf62d3d5a7f6fa.tar.xz wireguard-linux-32d7171ee2ae6e19c63b826904cf62d3d5a7f6fa.zip | |
drm/i915/gen12: Fix HDC pipeline flush
HDC pipeline flush is bit on the first dword of
the PIPE_CONTROL, not the second. Make it so.
v2: function naming (Chris)
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200506144734.29297-2-mika.kuoppala@linux.intel.com
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions