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| author |   Imre Deak <imre.deak@intel.com> | 2019-04-25 21:52:53 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2019-05-02 17:15:09 +0300 |
| commit | cfda08cdac3401db03849a62206b539bb4e4632e (patch) | |
| tree | 5867b42d8ceb17cba66062c5a50408c3c26b4a1f /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | drm/i915/icl: Factor out combo PHY lane power setup helper (diff) | |
| download | wireguard-linux-cfda08cdac3401db03849a62206b539bb4e4632e.tar.xz wireguard-linux-cfda08cdac3401db03849a62206b539bb4e4632e.zip | |
drm/i915/icl: Add missing combo PHY lane power setup
This step of the BSpec combo PHY port enabling is missing, so add it
now.
v2:
- Rebased on the new fixed v2 version of the helper.
v3:
- Use intel_ instead of icl_ prefix. (Jani)
Reported-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425185253.3197-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
0 files changed, 0 insertions, 0 deletions