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| author |   Philipp Zabel <p.zabel@pengutronix.de> | 2016-05-09 17:02:13 +0200 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2016-05-30 09:14:00 +0200 |
| commit | 4ed094fd73a7c0b8534685d2ed0f0f3ccdb96bdf (patch) | |
| tree | 80af179510cd686e4b8736a1c725d100ccc27a92 /drivers/gpu/drm/imx/imx-tve.c | |
| parent | drm/imx: ipuv3-plane: enable UYVY and VYUY formats (diff) | |
| download | wireguard-linux-4ed094fd73a7c0b8534685d2ed0f0f3ccdb96bdf.tar.xz wireguard-linux-4ed094fd73a7c0b8534685d2ed0f0f3ccdb96bdf.zip | |
drm/imx: use bus_flags for pixel clock polarity
This patch allows panels to set pixel clock and data enable pin polarity
other than the default of driving data at the falling pixel clock edge
and active high display enable.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/imx/imx-tve.c')
| -rw-r--r-- | drivers/gpu/drm/imx/imx-tve.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c index ae7a9fb3b8a2..baf788121287 100644 --- a/drivers/gpu/drm/imx/imx-tve.c +++ b/drivers/gpu/drm/imx/imx-tve.c @@ -294,8 +294,10 @@ static void imx_tve_encoder_prepare(struct drm_encoder *encoder) switch (tve->mode) { case TVE_MODE_VGA: - imx_drm_set_bus_format_pins(encoder, MEDIA_BUS_FMT_GBR888_1X24, - tve->hsync_pin, tve->vsync_pin); + imx_drm_set_bus_config(encoder, MEDIA_BUS_FMT_GBR888_1X24, + tve->hsync_pin, tve->vsync_pin, + DRM_BUS_FLAG_DE_HIGH | + DRM_BUS_FLAG_PIXDATA_NEGEDGE); break; case TVE_MODE_TVOUT: imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_YUV8_1X24); |