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| author |   Olivier Moysan <olivier.moysan@foss.st.com> | 2022-10-12 16:21:59 +0200 |
|---|---|---|
| committer |   Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-11-23 19:43:59 +0000 |
| commit | 6cafcdb19ee4a0a073e4a8b0828698f8816c800c (patch) | |
| tree | 012a0501a4d82f5d15b20893b3d8b5540236bee6 /drivers/iio/adc/stm32-adc-core.c | |
| parent | iio: imu: st_lsm6dsx: introduce st_lsm6dsx_device_set_enable routine (diff) | |
| download | wireguard-linux-6cafcdb19ee4a0a073e4a8b0828698f8816c800c.tar.xz wireguard-linux-6cafcdb19ee4a0a073e4a8b0828698f8816c800c.zip | |
dt-bindings: iio: adc: stm32-adc: add stm32mp13 compatibles
Add st,stm32mp13-adc-core and st,stm32mp13-adc compatibles
to support STM32MPU13 SoC.
On STM32MP13x, each ADC peripheral has a single ADC block.
These ADC peripherals, ADC1 and ADC2, are fully independent.
Main characteristics of STM32MP13x ADC:
- One interrupt line per ADC
- 6 to 12 bits resolution
- 19 channels
ADC2 instance supports two extra internal channels VDDCPU and VDDQ_DDR.
Add "vddcpu" and "vddq_ddr" internal channels names to the reserved
labels list.
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221012142205.13041-3-olivier.moysan@foss.st.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc/stm32-adc-core.c')
0 files changed, 0 insertions, 0 deletions