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authorMartin Kelly <mkelly@xevo.com>2018-04-20 09:54:00 -0700
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2018-04-21 16:24:30 +0100
commit5ec6486daa98ba4bb18542116db7d867986c0ebe (patch)
treea5edf818833df832edec52a40de58f05c80c7b18 /drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
parentiio: imu: inv_mpu6050: use set_power_itg function in i2c mux (diff)
downloadwireguard-linux-5ec6486daa98ba4bb18542116db7d867986c0ebe.tar.xz
wireguard-linux-5ec6486daa98ba4bb18542116db7d867986c0ebe.zip
iio:imu: inv_mpu6050: support more interrupt types
Currently, we support only rising edge interrupts, and in fact we assume that the interrupt we're given is rising edge (and things won't work if it's not). However, the device supports rising edge, falling edge, level low, and level high interrupts. Empirically, on my system, switching to level interrupts has fixed a problem I had with significant (~40%) interrupt loss with edge interrupts. This issue is likely related to the SoC I'm using (Allwinner H3), but being able to switch the interrupt type is still a very useful workaround. I tested this with each interrupt type and verified correct behavior in a logic analyzer. Add support for these interrupt types while also eliminating the error case of the device tree and driver using different interrupt types. Signed-off-by: Martin Kelly <mkelly@xevo.com> Acked-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c')
-rw-r--r--drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
index eca34b9ed838..27e777c58bbe 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c
@@ -38,8 +38,7 @@ static int inv_mpu6050_select_bypass(struct i2c_mux_core *muxc, u32 chan_id)
goto error_unlock;
ret = regmap_write(st->map, st->reg->int_pin_cfg,
- INV_MPU6050_INT_PIN_CFG |
- INV_MPU6050_BIT_BYPASS_EN);
+ st->irq_mask | INV_MPU6050_BIT_BYPASS_EN);
error_unlock:
mutex_unlock(&st->lock);
@@ -55,7 +54,7 @@ static int inv_mpu6050_deselect_bypass(struct i2c_mux_core *muxc, u32 chan_id)
mutex_lock(&st->lock);
/* It doesn't really mattter, if any of the calls fails */
- regmap_write(st->map, st->reg->int_pin_cfg, INV_MPU6050_INT_PIN_CFG);
+ regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
inv_mpu6050_set_power_itg(st, false);
mutex_unlock(&st->lock);