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authorTomi Valkeinen <tomi.valkeinen@ti.com>2020-03-25 13:14:59 +0100
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-04-14 12:48:06 +0200
commit09ea44ca0743ad0b0b29935916f4fbf296a3cc1a (patch)
tree2578f4527751ff5d03f240a3a4d677e89d95658c /drivers/media/platform
parentmedia: ti-vpe: cal: print errors on timeouts (diff)
downloadwireguard-linux-09ea44ca0743ad0b0b29935916f4fbf296a3cc1a.tar.xz
wireguard-linux-09ea44ca0743ad0b0b29935916f4fbf296a3cc1a.zip
media: ti-vpe: cal: simplify irq handling
Instead of having identical code block to handle irqs for the two CAL ports, we can have a for loop and a single code block. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/platform')
-rw-r--r--drivers/media/platform/ti-vpe/cal.c68
1 files changed, 25 insertions, 43 deletions
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
index 9bfe83fdd76e..df06ecfdfc6a 100644
--- a/drivers/media/platform/ti-vpe/cal.c
+++ b/drivers/media/platform/ti-vpe/cal.c
@@ -1221,64 +1221,46 @@ static irqreturn_t cal_irq(int irq_cal, void *data)
/* Check which DMA just finished */
irqst2 = reg_read(dev, CAL_HL_IRQSTATUS(2));
if (irqst2) {
+ int i;
+
/* Clear Interrupt status */
reg_write(dev, CAL_HL_IRQSTATUS(2), irqst2);
- /* Need to check both port */
- if (isportirqset(irqst2, 1)) {
- ctx = dev->ctx[0];
-
- spin_lock(&ctx->slock);
- ctx->dma_act = false;
-
- if (ctx->cur_frm != ctx->next_frm)
- cal_process_buffer_complete(ctx);
-
- spin_unlock(&ctx->slock);
- }
-
- if (isportirqset(irqst2, 2)) {
- ctx = dev->ctx[1];
+ for (i = 1; i <= 2; ++i) {
+ if (isportirqset(irqst2, i)) {
+ ctx = dev->ctx[i - 1];
- spin_lock(&ctx->slock);
- ctx->dma_act = false;
+ spin_lock(&ctx->slock);
+ ctx->dma_act = false;
- if (ctx->cur_frm != ctx->next_frm)
- cal_process_buffer_complete(ctx);
+ if (ctx->cur_frm != ctx->next_frm)
+ cal_process_buffer_complete(ctx);
- spin_unlock(&ctx->slock);
+ spin_unlock(&ctx->slock);
+ }
}
}
/* Check which DMA just started */
irqst3 = reg_read(dev, CAL_HL_IRQSTATUS(3));
if (irqst3) {
+ int i;
+
/* Clear Interrupt status */
reg_write(dev, CAL_HL_IRQSTATUS(3), irqst3);
- /* Need to check both port */
- if (isportirqset(irqst3, 1)) {
- ctx = dev->ctx[0];
- dma_q = &ctx->vidq;
-
- spin_lock(&ctx->slock);
- ctx->dma_act = true;
- if (!list_empty(&dma_q->active) &&
- ctx->cur_frm == ctx->next_frm)
- cal_schedule_next_buffer(ctx);
- spin_unlock(&ctx->slock);
- }
-
- if (isportirqset(irqst3, 2)) {
- ctx = dev->ctx[1];
- dma_q = &ctx->vidq;
-
- spin_lock(&ctx->slock);
- ctx->dma_act = true;
- if (!list_empty(&dma_q->active) &&
- ctx->cur_frm == ctx->next_frm)
- cal_schedule_next_buffer(ctx);
- spin_unlock(&ctx->slock);
+ for (i = 1; i <= 2; ++i) {
+ if (isportirqset(irqst3, i)) {
+ ctx = dev->ctx[i - 1];
+ dma_q = &ctx->vidq;
+
+ spin_lock(&ctx->slock);
+ ctx->dma_act = true;
+ if (!list_empty(&dma_q->active) &&
+ ctx->cur_frm == ctx->next_frm)
+ cal_schedule_next_buffer(ctx);
+ spin_unlock(&ctx->slock);
+ }
}
}