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| author |   Tomi Valkeinen <tomi.valkeinen@ti.com> | 2020-03-25 13:15:07 +0100 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-04-14 12:51:05 +0200 |
| commit | cbdda28ab9302db941d0303d39aa775896e617e4 (patch) | |
| tree | edf3439b7f6089e136d83559e3a10db446aebd45 /drivers/media/platform | |
| parent | media: ti-vpe: cal: set DMA max seg size (diff) | |
| download | wireguard-linux-cbdda28ab9302db941d0303d39aa775896e617e4.tar.xz wireguard-linux-cbdda28ab9302db941d0303d39aa775896e617e4.zip | |
media: ti-vpe: cal: move code to separate functions
To make csi2_wait_for_phy() more readable, move code to separate
functions.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
[hverkuil-cisco@xs4all.nl: delete empty line before } ]
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/platform')
| -rw-r--r-- | drivers/media/platform/ti-vpe/cal.c | 36 |
1 files changed, 24 insertions, 12 deletions
diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c index 67954754ffff..318b70ec452e 100644 --- a/drivers/media/platform/ti-vpe/cal.c +++ b/drivers/media/platform/ti-vpe/cal.c @@ -823,20 +823,10 @@ static void csi2_phy_init(struct cal_ctx *ctx) csi2_cio_power(ctx, true); } -static void csi2_wait_for_phy(struct cal_ctx *ctx) +static void csi2_wait_complexio_reset(struct cal_ctx *ctx) { int i; - /* Steps - * 2. Wait for completion of reset - * Note if the external sensor is not sending byte clock, - * the reset will timeout - * 4.Force FORCERXMODE - * G. Wait for all enabled lane to reach stop state - * H. Disable pull down using pad control - */ - - /* 2. Wait for reset completion */ for (i = 0; i < 250; i++) { if (reg_read_field(ctx->dev, CAL_CSI2_COMPLEXIO_CFG(ctx->csi2_port), @@ -850,8 +840,12 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_MASK) != CAL_CSI2_COMPLEXIO_CFG_RESET_DONE_RESETCOMPLETED) ctx_err(ctx, "Timeout waiting for Complex IO reset done\n"); +} + +static void csi2_wait_stop_state(struct cal_ctx *ctx) +{ + int i; - /* 4. G. Wait for all enabled lane to reach stop state */ for (i = 0; i < 10; i++) { if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), @@ -863,6 +857,24 @@ static void csi2_wait_for_phy(struct cal_ctx *ctx) if (reg_read_field(ctx->dev, CAL_CSI2_TIMING(ctx->csi2_port), CAL_CSI2_TIMING_FORCE_RX_MODE_IO1_MASK) != 0) ctx_err(ctx, "Timeout waiting for stop state\n"); +} + +static void csi2_wait_for_phy(struct cal_ctx *ctx) +{ + /* Steps + * 2. Wait for completion of reset + * Note if the external sensor is not sending byte clock, + * the reset will timeout + * 4.Force FORCERXMODE + * G. Wait for all enabled lane to reach stop state + * H. Disable pull down using pad control + */ + + /* 2. Wait for reset completion */ + csi2_wait_complexio_reset(ctx); + + /* 4. G. Wait for all enabled lane to reach stop state */ + csi2_wait_stop_state(ctx); ctx_dbg(1, ctx, "CSI2_%d_REG1 = 0x%08x (Bit(31,28) should be set!)\n", (ctx->csi2_port - 1), reg_read(ctx->cc, CAL_CSI2_PHY_REG1)); |