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| author |   Christophe JAILLET <christophe.jaillet@wanadoo.fr> | 2020-05-05 09:50:34 +0200 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-05-05 17:26:26 +0200 |
| commit | 62eedb356188376acd0368384a9b294d5180c00b (patch) | |
| tree | 43cfcd011d9d2b90bdb318bbe1ae26d58bb97681 /drivers/media | |
| parent | media: vimc: deb: Add support for {RGB,BGR,GBR}888 bus formats on source pad (diff) | |
| download | wireguard-linux-62eedb356188376acd0368384a9b294d5180c00b.tar.xz wireguard-linux-62eedb356188376acd0368384a9b294d5180c00b.zip | |
media: sun8i: Fix an error handling path in 'deinterlace_runtime_resume()'
It is spurious to call 'clk_disable_unprepare()' when
'clk_prepare_enable()' has not been called yet.
Re-order the error handling path to avoid it.
Fixes: a4260ea49547 ("media: sun4i: Add H3 deinterlace driver")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
[hverkuil-cisco@xs4all.nl: err_exlusive_rate -> err_exclusive_rate]
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media')
| -rw-r--r-- | drivers/media/platform/sunxi/sun8i-di/sun8i-di.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c index d78f6593ddd1..ba5d07886607 100644 --- a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c +++ b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c @@ -941,7 +941,7 @@ static int deinterlace_runtime_resume(struct device *device) if (ret) { dev_err(dev->dev, "Failed to enable bus clock\n"); - goto err_exlusive_rate; + goto err_exclusive_rate; } ret = clk_prepare_enable(dev->mod_clk); @@ -969,14 +969,14 @@ static int deinterlace_runtime_resume(struct device *device) return 0; -err_exlusive_rate: - clk_rate_exclusive_put(dev->mod_clk); err_ram_clk: clk_disable_unprepare(dev->ram_clk); err_mod_clk: clk_disable_unprepare(dev->mod_clk); err_bus_clk: clk_disable_unprepare(dev->bus_clk); +err_exclusive_rate: + clk_rate_exclusive_put(dev->mod_clk); return ret; } |