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author | 2017-08-15 10:17:03 +0800 | |
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committer | 2017-08-30 15:03:36 +0200 | |
commit | 2f3110cc89c29a790c8b31c7983603d60b9ede49 (patch) | |
tree | 808f654d49f64a5a0d1a45675d34668d9613e29e /drivers/mmc/core/queue.h | |
parent | mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling (diff) | |
download | wireguard-linux-2f3110cc89c29a790c8b31c7983603d60b9ede49.tar.xz wireguard-linux-2f3110cc89c29a790c8b31c7983603d60b9ede49.zip |
mmc: sdhci-of-esdhc: support ESDHC_CAPABILITIES_1 accessing
eSDHC is not a standard SD host controller. SDHCI_CAPABILITIES_1
register address is 0x44 while it's 0x114 (ESDHC_CAPABILITIES_1)
for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/core/queue.h')
0 files changed, 0 insertions, 0 deletions