diff options
| author |   Igor Russkikh <igor.russkikh@aquantia.com> | 2018-01-15 16:41:16 +0300 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2018-01-16 14:40:00 -0500 |
| commit | c40d20150d9ccebf9ea44d521794745975c2690d (patch) | |
| tree | 9cd1609ba3b4ae536f51db868bbdab916aff20be /drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h | |
| parent | net: aquantia: Cleanup hardware access modules (diff) | |
| download | wireguard-linux-c40d20150d9ccebf9ea44d521794745975c2690d.tar.xz wireguard-linux-c40d20150d9ccebf9ea44d521794745975c2690d.zip | |
net: aquantia: Remove duplicate hardware descriptors declarations
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h')
| -rw-r--r-- | drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h index 9aa2c6edfca2..740ff73c6d67 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h @@ -142,37 +142,6 @@ #define HW_ATL_INTR_MODER_MAX 0x1FF #define HW_ATL_INTR_MODER_MIN 0xFF -/* Hardware tx descriptor */ -struct __packed hw_atl_txd_s { - u64 buf_addr; - u32 ctl; - u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */ -}; - -/* Hardware tx context descriptor */ -struct __packed hw_atl_txc_s { - u32 rsvd; - u32 len; - u32 ctl; - u32 len2; -}; - -/* Hardware rx descriptor */ -struct __packed hw_atl_rxd_s { - u64 buf_addr; - u64 hdr_addr; -}; - -/* Hardware rx descriptor writeback */ -struct __packed hw_atl_rxd_wb_s { - u32 type; - u32 rss_hash; - u16 status; - u16 pkt_len; - u16 next_desc_ptr; - u16 vlan; -}; - /* HW layer capabilities */ static struct aq_hw_caps_s hw_atl_b0_hw_caps_ = { .ports = 1U, |