diff options
| author |   Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-10-27 14:11:13 +0100 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2022-10-28 21:48:31 -0700 |
| commit | f752c0df13dfeb721c11d3debb79f08cf437344f (patch) | |
| tree | 46e4ca08e25720ab970c54b47b1f5eac17b0e31c /drivers/net/ethernet/mediatek/mtk_sgmii.c | |
| parent | net: mtk_eth_soc: move PHY power up (diff) | |
| download | wireguard-linux-f752c0df13dfeb721c11d3debb79f08cf437344f.tar.xz wireguard-linux-f752c0df13dfeb721c11d3debb79f08cf437344f.zip | |
net: mtk_eth_soc: move interface speed selection
Move the selection of the underlying interface speed to the pcs_config
function, so we always program the interface speed.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/mediatek/mtk_sgmii.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/net/ethernet/mediatek/mtk_sgmii.c b/drivers/net/ethernet/mediatek/mtk_sgmii.c index 63b25574caac..c590d5847e2e 100644 --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c @@ -53,14 +53,6 @@ static void mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs) static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs, phy_interface_t interface) { - unsigned int rgc3; - - if (interface == PHY_INTERFACE_MODE_2500BASEX) - rgc3 = RG_PHY_SPEED_3_125G; - - regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3, - RG_PHY_SPEED_3_125G, rgc3); - /* Disable SGMII AN */ regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1, SGMII_AN_ENABLE, 0); @@ -77,6 +69,16 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode, bool permit_pause_to_mac) { struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs); + unsigned int rgc3; + + if (interface == PHY_INTERFACE_MODE_2500BASEX) + rgc3 = RG_PHY_SPEED_3_125G; + else + rgc3 = 0; + + /* Configure the underlying interface speed */ + regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3, + RG_PHY_SPEED_3_125G, rgc3); /* Setup SGMIISYS with the determined property */ if (interface != PHY_INTERFACE_MODE_SGMII) |