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| author |   Chris Mi <cmi@nvidia.com> | 2021-08-16 22:00:30 +0800 |
|---|---|---|
| committer |   Saeed Mahameed <saeedm@nvidia.com> | 2021-08-19 21:50:37 -0700 |
| commit | 6f0b692a5aa96b4fd0f14a2ac54b590cd9b9f192 (patch) | |
| tree | 304d9cd2cc56c7b8e9b50e6b9ec5884eeb961c89 /drivers/net/ethernet/mellanox/mlx5/core/Makefile | |
| parent | net/mlx5e: CT, Use xarray to manage fte ids (diff) | |
| download | wireguard-linux-6f0b692a5aa96b4fd0f14a2ac54b590cd9b9f192.tar.xz wireguard-linux-6f0b692a5aa96b4fd0f14a2ac54b590cd9b9f192.zip | |
net/mlx5e: Introduce post action infrastructure
Some tc actions are modeled in hardware using multiple tables
causing a tc action list split. For example, CT action is modeled
by jumping to a ct table which is controlled by nf flowtable.
sFlow jumps in hardware to a sample table, which continues to a
"default table" where it should continue processing the action list.
Multi table actions are modeled in hardware using a unique fte_id.
The fte_id is set before jumping to a table. Split actions continue
to a post-action table where the matched fte_id value continues the
execution the tc action list.
Currently the post-action design is implemented only by the ct
action. Introduce post action infrastructure as a pre-step for
reusing it with the sFlow offload feature. Init and destroy the
common post action table. Refactor the ct offload to use the
common post table infrastructure in the next patch.
Signed-off-by: Chris Mi <cmi@nvidia.com>
Reviewed-by: Oz Shlomo <ozsh@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/Makefile')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/Makefile | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile index 34e17e502e40..024d72b3b1aa 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/Makefile +++ b/drivers/net/ethernet/mellanox/mlx5/core/Makefile @@ -44,7 +44,8 @@ mlx5_core-$(CONFIG_MLX5_CLS_ACT) += en_tc.o en/rep/tc.o en/rep/neigh.o \ lib/fs_chains.o en/tc_tun.o \ esw/indir_table.o en/tc_tun_encap.o \ en/tc_tun_vxlan.o en/tc_tun_gre.o en/tc_tun_geneve.o \ - en/tc_tun_mplsoudp.o diag/en_tc_tracepoint.o + en/tc_tun_mplsoudp.o diag/en_tc_tracepoint.o \ + en/tc/post_act.o mlx5_core-$(CONFIG_MLX5_TC_CT) += en/tc_ct.o mlx5_core-$(CONFIG_MLX5_TC_SAMPLE) += en/tc/sample.o |